lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 1 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? descri pt i on the lx1912 operates as a current mode pwm buck regulator that switches to pfm mode with light loads. the entire regulator function is implemented with few external components. the lx1912 responds quickly to dynamic load changes using a high bandwidth error amplifier and internal compensation. tight output voltage regulation is maintained with the compensated 800mv, 2% reference (line and temp regulation). with two external resistors the output voltage is easily programmed, from 800mv to 90% of v in . the regulator is capable of providing an output load current of 1.0a, has no minimum load current requirement for stable operation. current limit is cycle-by-cycle to protect the switch. power conversion efficiency is maximized with low regulator iq and pfm mode of operation the lx1912 operational range covers 4.0v to 6.0v, features include power on delay; soft start to limit inrush currents; and thermal shutdown during fault conditions. the 6-pin tsot package provides a small form factor with excellent power dissipation capability. important: for the most current data, consult microsemi s website: http://www.microsemi.com k ey feat u r es ? internal reference 800mv 2% accuracy (line and temp.) ? 4.0v to 6.0v input range ? internal soft start ? adj. output from 0.8v to 90% of v in ? output current up to 1.0a ? quiescent current < 550 a, typical @ 23c ? 1.2mhz pwm frequency ? over voltage protection appli c at i on s ? portable microprocessor core voltage supplies ? 5v to 3v ? rohs compliant product produ ct h i gh li gh t part vccgnd n.c. fb sw 4.7f 4v to 6v 2.7h 31.6k 10k 30f 3.3v @ 1.0a lx1912 vpwr efficiency (vin = 5v, vout @ 3.3v) 50% 55% 60% 65% 70% 75% 80% 85% 90% 95% 0.01 0.10 1.00 output current (amps) efficiency figure 1 C lx1912 circuit topology and typical efficiency performance pack age order i n fo sg plastic tsot 6-pin part marking t a ( c) input voltage output voltage range rohs compliant / pb-free 0 to +70 4.0v C 6.0v adjustable LX1912CSG 1912 note: available in tape & reel. append the lett ers tr to the part number. (i.e. LX1912CSG-tr) l l x x 1 1 9 9 1 1 2 2 obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 2 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? absolu t e m ax i m u m rat i n gs input voltage (vcc and vpwr).......................................................................................-0.3 v to 7.0 v sw to gnd.............................................................................................................-0.3v to (v in + 0.3v) v fb to gnd........................................................................................................................ ..-0.3v to +2v sw peak current .........................................................................................................interna lly limited operating junction temperature range (t j ).................................................................-40 c to +125 c storage temperature range, t a ...................................................................................... -65 c to 150 c maximum junction temperature................................................................................................... .150 c peak package solder reflow temp . (40 seconds ma x. expos ure) ...................................260 c (+0, -5) note: exceeding these ratings could cause damage to the device. all voltages are with respect to ground. currents are positive into, ne gative out of specified terminal. t h erm al dat a sg plastic tsot 6-pin thermal resistance - junction to a mbient , ja 134 c/w junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performan ce of the device/pc-board system. all of the above assume no ambient airflow. pack age pi n ou t 12 34 5 6 n.c. gnd fb vcc vpwr sw sg p ackage (top view) rohs / pb-free 100% matte tin lead finish n.c. C no internal connection fu n ct i on al pi n descri pt i on name description vcc unregulated supply voltage input, ranging from +4v to 6.0v for internal analog control circuitry. vpwr unregulated supply voltage for pmosfet drain to drive the switch pin. fb feedback input for setting programming output voltage. gnd circuit ground providing bi as for ic operation and high frequency gate drive bias. sw inductor and commutation diode connection point. connects to internal pmosfet source. p p a a c c k k a a g g e e d d a a t t a a obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 3 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? elect ri cal ch a ract eri st i cs specifications apply over junc tion temperature of: -20c < t j < 125c for vcc = vpwr = 5v (except where otherwise noted). typical values are at t a =23c. parameter symbol test conditions min typ max units operating range 1 vcc functional operation guaranteed by design 4.0 6.0 v feed back threshold v fbt 4.0v < vcc < 6.0v 784 800 816 mv fb input current i fb v fb = 0.81v 40 75 na error amplifier bw closed loop 200 khz quiescent operating current i q (pin 4) v fb > 0.825v, r load switch pin < 1k 500 850 a soft start, v out slew rate vo initial power on or after short circuit 21 50 v/ms p-channel switch on resistance r ds(on) i sw = 1.0a 0.375 0.6 maximum duty cycle d i sw = 1.0a (assured by design, not ate tested) 80 % sw leakage current i leak v fb = 0.825v 0.01 5 a under voltage lockout vcc rising 3.00 v under voltage lockout vcc falling 2.4 uvlo uvlo hysteresis 0.15 p-channel current limit 2 i lim peak current at switch pin (not dc current) 1.50 2.30 a pwm frequency f op-pwm pwm mode 820 1200 1920 khz pfm mode region io pfm mode load current crossover 100 ma feed back psrr 1hz < frequency vcc < 10khz -40 db closed loop load regulation load reg v o = 1.2v, 50ma < i o < 1.0a, ckt figure 1 0.85 %v o thermal shutdown t sd (assured by design, not ate tested) 135 150 c note 1: v in vs v out ratio @ 1.0a load is set at v in = v out + 1.0v note 2: 1.0 amp operation @ 70c ambient de pends on adequate heat sinking to keep t j below 125c e e l l e e c c t t r r i i c c a a l l s s obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 4 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? si m pli fi ed block di agram vpwr cl clock and ramp pwm ea gnd bg ref 800mv ovp 920mv ref sr fb sw lx1912 vcc uvlo bias figure 2 C lx1912 block diagram pcb lay ou t inductor diode c out c out c out c out n.c. gnd fb vcc vpwr sw lx1912 rf rf ground v in v out c in figure 3 C pcb layout considerations a a p p p p l l i i c c a a t t i i o o n n s s obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 5 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? appli cat i on n ot e f unctional d escription the lx1912 is a current mode pwm regulator with internal compensation. the internal pmos high side sw itch is protected with current limit on a pulse by pulse basis and with thermal shutdown. thermal shutdown is activated with a junction temperature of 160c (typical) and has 20c of hysteresis. the regulator has an internal power on reset delay of 50- 100s to ensure all circuitry is operating before enabling the switch output. soft start is activated upon in itial power-on, or following recovery from either thermal shutdow n or short circuit. the soft start control block generates a voltage ramp that clamps the error amplifier non-inverting reference vol tage. as this clamp voltage rises, the duty cycle is gradually increased, thus limiting the peak inrush currents. pwm / pfm mode of operation is determined by the load current condition. the pfm mode increases system efficiency by reducing the switching frequency t hus switching losses. during light loading, i out < 200ma typically, pfm mode becomes active, the switching frequency begins to decrease, the frequency change occurs over a continuous range , decreasing further as i out decreases. o utput o ver v oltage p rotection the over voltage comparator compares the fb pin voltage to a voltage that is 15% higher than the internal referenced vref. once the fb pin voltage goes 15% above the internal reference, the internal pmos control switch is turned off, which allows the output voltage to decrease toward regulation. o utput v oltage p rogramming resistors r1 and r2 program the output voltage. the total impedance of both feedback resistors should not exceed 50k ohms to ensure optimal frequency stability. the value of r1 can be determined using the following equation, note v ref is also referred to as v fbt . 1 v v r2 r1 ref out ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = d iode s election a schottky diode is required for switching speed and low forward voltage. efficiency is de termined mostly by the diodes forward voltage. the diode conducts 1-d%, for v out =1.2v this becomes 76% in a 5v system. i nductor s election selecting the appropriate indu ctor type and value ensures optimal performance of the convert er circuit for the intended application. a primary considera tion requires the selection of an inductor that will not saturate at the peak current level. emi, output voltage ripple, and overall ci rcuit efficiency affect inductor choice. the inductor that works best depends upon the applications requireme nts and some experime ntation with actual devices in-circuit is typically necessary to make the most effective choice. i nductor s election , cont . the lx1912 stability performance is optimized by using an inductor value of 2.7h 20%. th e benefit of a larger inductor value can increase efficiency at the lower output currents and reduces output voltage ripple, thus output capacitance related to ripple filtering. smaller inductors typically provide smaller package size (critical in many portable applications) at the expense of increasing output ripple current. regardless of inductor value, selecting a device manufactured with a ferrite-core produces lower losses at higher switching frequenc ies and thus better overall performance. larger inductors ma y lead to diminished step-load response. c apacitor s election to minimize ripple voltage, output capacitors with a low series resistance (esr) are recommended. multi-layer ceramic capacitors with x5r or x7r dielectric make an effective choice because they feature small size, very low esr, a temperature stable dielectric, and can be connected in parallel to increase capacitance. typical output capacitance values of 20 to 60f have proven effective. other low esr capacitors such as solid tantalum, specialty polymer, or organic semiconductor, make effective choices provided that the capacitor is properly rated for the output voltage and ripple current. finally, choose an input capacitor of sufficient size to effectively decouple the input voltage s ource impedance (e.g., c in > 4.7 f). l ayout c onsiderations the high peak currents and switching frequencies present in dc/dc converter applications requi re careful attention to device layout for optimal performance. basic design rules include: (1) maintaining wide traces for power components (e.g., width > 50mils); (2) place cin, cout, the schottky diode, and the inductor close to the lx1912; (3) minimizing trace capacitance by reducing the etch area connecting the sw pin to the inductor; and (4) minimizing the etch length to the fb pin to reduce noise coupling into this high impedanc e sense input. other considerations include placing a 0.1uf capacitor between the lx1912 vout pin and gnd pin to reduce high frequency noise and decoupling the vcc, vpwr pins using a 0.1f capacitor. a a p p p p l l i i c c a a t t i i o o n n s s obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 6 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? ch aract er i st i c cu rv es uvlo thresholds- vin rising and falling 0 0.2 0.4 0.6 0.8 1 1.2 1.4 2.4 2.45 2.5 2.55 2.6 2.65 2.7 2.75 2.8 2.85 2.9 2.95 3 3.05 3.1 vin, volts 120c 0c figure 4C under voltage lockout for v in pwm frequency vs load current 1.0.e+05 2.0.e+05 3.0.e+05 4.0.e+05 5.0.e+05 6.0.e+05 7.0.e+05 8.0.e+05 9.0.e+05 1.0.e+06 1.1.e+06 1.2.e+06 1.3.e+06 1.4.e+06 load current, a pwm switching frequency, hz 0.001 0.01 0.1 1 figure 5 C pfm / pwm range of output switch figure 6 C step load response 300ma to 800ma, l = 2.7h, c out = 30f figure 7C soft start power on, l = 2.7h, c out = 30f, i out = 0ma dc c c h h a a r r t t s s obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 7 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? pack age di m en si on s sg 6 pin tsot d e1 e b e e1 a2 a1 e a l m illimeters i nches dim min max min max a - 1.00 - 0.039 a1 0.01 0.10 0.0004 0.004 a2 0.84 0.90 0.033 0.035 b 0.30 0.45 0.012 0.018 c 0.12 0.20 0.005 0.008 d 2.90 bsc 0.114 bsc e 2.80 bsc 0.110 bsc e1 1.60 bsc 0.063 bsc e1 1.90 bsc 0.075 bsc e 0.095 bsc 0.037 bsc l 0.30 0.50 0.012 l2 0.25 bsc 0.010 bsc note: 1. dimensions do not include mold flash or protrusions; these shall not exceed 0.15mm (.006) on any side. lead dimension shall not include solder coverage. m m e e c c h h a a n n i i c c a a l l s s obsolete downloaded from: http:///
lx1912 p roduction d ata sheet microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 8 copyright ? 2005 rev. 1.0, 2006-09-06 www. microsemi . com vref @ 800mv, 1.0a, 1.2mhz pwm tm ? n ot es production data C information contained in this document is proprietary to microsemi and is current as of publication date. this document may not be modified in any way without the express written consent of microsemi. product processing does not necessarily include testing of all parameters. microsemi reserves th e right to change the configuration and performance of the product and to discontinue product at any time. n n o o t t e e s s obsolete downloaded from: http:///
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